Gyroscope offset is an amplitude modulated signal and is typically corrected by applying a correction signal that is chopped at the resonant frequency of the gyroscope. The chopped correction signal typically comes from a buffered digital-to-analog converter (DAC) that is trimmed using N bits. The chopped signal is characterized by a sharp rise/fall time and quick settling. Achieving these attributes at low power is a challenge.
Typically, in applications where the analog signal is chopped and applied to sensors with large parasitic capacitive load (e.g., 5 pf to 6 pf), a high bandwidth buffer is used before the chopper to achieve the sharp rise/fall and quick settling. FIG. 1 is a schematic diagram showing a first analog chopper circuit as known in the art. Among other things, the analog chopper circuit includes a high bandwidth buffer 104 and a chopper 106 to process analog signals from digital-to-analog converter (DAC) 102 and provide chopped signals to sensor 110 via sensor parasitic load (Cpar) 108. The DAC 102 produces the analog signals based on a DAC input code 101. The high bandwidth buffer 104 is typically a switched capacitor differential buffer in order to avoid any resistive loading on the DAC, although other buffer architectures can be used in various alternative embodiments. FIG. 2 is a schematic diagram showing the chopped output of the circuit shown in FIG. 1. A significant amount of power is burnt in this buffer to achieve the required performance, and the power requirement of the buffer scales with the rise/fall time requirements. To illustrate an example of the bandwidth requirements of the buffer, in order to achieve rise and fall time of 5% of the chopping interval (½*fo), bandwidth of the buffer needs to be 10 times 2*fo, where fo is the resonant frequency of the sensor. The price paid in terms of power is high for achieving high bandwidth for a buffer driving higher sensor parasitic load (e.g., 5 pf to 6 pf).
As a solution to the previous problem, a large capacitor (Clarge) is typically placed ahead of the chopper (i.e., at the output of the buffer) in order to alleviate some of the bandwidth requirements of the buffer and provide instantaneous rise and fall (through charge sharing with sensor parasitic load Cpar 108) of the chopped output. FIG. 3 is a schematic diagram showing an analog chopper circuit with large capacitor (Clarge) 105 between the high bandwidth buffer 104 and the chopper 106. FIG. 4 is a schematic diagram showing the chopped output of the circuit shown in FIG. 3. Even though Clarge 105 alleviates the bandwidth requirements by allowing the use of a lower bandwidth buffer (e.g., 5 times the chopping interval of 2*fo is sufficient for more than 18 bits of settling), in order to achieve final settling, the buffer still has to burn a lot of power to drive this large capacitance (Clarge).
Various methods to detect and compensate for offset error in MEMS inertial sensors are described in U.S. Pat. No. 8,783,103 corresponding to US Patent Application Publication No. 2011/0041609 and in U.S. Pat. No. 8,677,801 corresponding to US Patent Application Publication No. 2014/0060186. One of the compensation methods described is implemented by chopping the correction signal at the resonant frequency of the sensor and applying it to the in-phase trim electrodes of the sensor.